An ASIC is a SHA-256 factory
No screen, no keyboard: an Antminer is a box that takes in power, water and work over Ethernet, and sends back hashes. Select a component to see what it does.
An open hashboard: 216 chips, 18 domains, one chain
One of the three hashboards, taken out of the machine and exploded: the cold plate and its water circuit at the top, the 216 BM1368 chips in the middle, the printed circuit board and its electronics at the bottom. The orange dots are the work traveling down the chain from chip to chip; the blue dots are the results traveling back up. Click a component.
The BM1368 chip seen from above
Schematic diagram: a mining chip is made almost entirely of the same circuit, repeated hundreds of times. Around it, only the essentials: work distribution, link to the neighboring chips, result filter, clock and thermal diode. Click an area.
A SHA-256 engine: the hard-wired pipeline
Double SHA-256 etched into 128 aligned stages. A new nonce enters on every clock tick and advances one stage per tick: 128 calculations are under way at the same time, and one hash comes out on every cycle. Click a part of the line.
Top cover
Aluminum sheet · no fans
On an air-cooled Antminer, the cover lets through the airflow of four noisy fans. On a Hydro model, it closes an almost airtight enclosure: all the heat goes into the water, and the machine produces only around fifty decibels, coming from the power supply.
Control board
Amlogic A113D or CVITEK CV1835 SoC · Linux + bmminer
The machine's “brain”, at the front under the handle. A small ARM computer runs the firmware: it connects to the mining pool over Ethernet (Stratum protocol), distributes work to the three hashboards over a serial link (UART), reads temperatures, adjusts frequencies and voltages, and shuts everything down in case of overheating. It also hosts the web interface and the IP Report / Reset buttons.
- 10/100 RJ45 port, backup micro-USB, status LEDs
- Replaceable without touching the hashboards
- This is where the HappyMining firmware is installed
Data ribbon cables
3 × 18-pin ribbon cables (2 × 9, 2 mm pitch)
A flat ribbon cable connects the control board to each hashboard. It carries the serial link that sends the work blocks and returns the results (the “shares”) and temperature readings, plus a few 3.3 V power lines for the board's logic. A poorly seated ribbon cable is the most common fault: the board then shows up as “missing” in the interface.
Hashboards (hashing boards)
3 boards · part number BHB686xx
The heart of the ASIC: three identical boards, each carrying 216 mining chips, their power delivery and their sensors. The chips are wired in a chain: the command enters through the first one and propagates to the last. Each board stores its own identity (EEPROM) and computes its share of the hashrate on its own; a machine keeps running, in degraded mode, with one or two boards.
- Multilayer printed circuit board with thick copper planes for the hundreds of amps
- 18 voltage “domains” in series, 12 chips in parallel per domain
- Chip side against the cold plate, component side facing outward
- Zoom all the way in or click “Hashboard” to open a board
BM1368 ASIC chips
648 chips (3 × 216) · ≈ 0.5 TH/s each
ASIC stands for Application-Specific Integrated Circuit: a chip that can do only one thing, in this case compute double SHA-256 hashes, trillions of times per second. The BM1368 is the chip of the S21 generation. The Hydro version carries twice as many as the air-cooled version (648 versus 324), each one pushed slightly less hard: this is what makes it more efficient (16 J/TH versus 17.5).
- Each chip receives a range of nonces to try and returns those that produce a hash below the target
- A thermal diode is built into each chip
- If a chip dies, all the chips that follow it in the chain go silent
Temperature sensors
2 per board (T0 inlet, T1 outlet) · I²C bus
Two digital sensors per board (U4 and U5, labeled T0 and T1), one on the water inlet side and the other on the outlet side, measure the temperature of the printed circuit board. Powered at 3.3 V by the control board, they are read over an I²C bus. The firmware monitors the board and the chips: alarm at 80 °C for the board and 95 °C for the chips, followed by a safety shutdown (Temperature is too high). Zoom in on a hashboard (next level) to see their specifications.
EEPROM and crystal
Board identity · 25 MHz clock
A small memory stores the board's serial number and its factory frequency and voltage, calibrated at the end of production: this is why an S21 hashboard cannot simply be transplanted anywhere. Next to it, a 25 MHz crystal sets the pace for the entire chain of chips. On the S21 generation, the EEPROM replaces the PIC microcontroller of the S19.
Board power stage
≈ 21 V → 18 domains in series · 25 V boost converter · LDO
The power supply sends about twenty volts directly to the board: the 18 chip domains, stacked in series, share this voltage, about 1.1 V each. At the front of the board, a small boost converter generates 25 V for the control electronics, and each domain has its own regulators (LDOs) for the 1.2 V and 0.8 V used by the chips' inputs/outputs. Inductors and capacitors absorb current surges when the chips change pace.
Data connectors
2 × 9-pin header on each board
The header into which the ribbon cable from the control board plugs. Its pins carry the serial link (TX/RX), the chain reset signal, the I²C bus for the sensors and the EEPROM, and the 3.3 V supply. A keying feature prevents it from being plugged in the wrong way round.
Power terminals
2 screw terminals per board · several hundred amps
An S21 Hydro hashboard draws nearly 1,800 W at about twenty volts, i.e. a current close to 90 A: nothing like a PC connector. Two copper terminals, screwed onto the power supply's busbars, deliver this current. A loose screw heats up, blackens the board and ends in a failure: it is a checkpoint at every maintenance.
Cold plates (water blocks)
Brazed aluminum · 8 to 10 L/min · water at 20 to 50 °C
Instead of the finned heatsink of an air-cooled model, each board is screwed against a brazed aluminum block hollowed out with channels through which water flows. The 216 chips are pressed against it through thermal paste. The water enters at the front, flows through the plate and leaves a few degrees warmer: 5 kW of heat to recover, for example to heat a building or a swimming pool.
- Pure water, deionized water or antifreeze according to the manual, pressure ≤ 3.5 bar
- DN10 quick connectors on the front panel manifolds
- Without water circulation, the chips exceed 80 °C within seconds: the firmware shuts down
Busbars
Copper · from the power supply to the three boards
Two copper bars (+ and −) run under the front of the boards and connect the power supply's output terminals to the terminals of the three hashboards. Solid copper replaces cables: less resistance, less heating, and an assembly that can be taken apart with a single wrench.
APW11 power supply (water-cooled)
380–415 V three-phase → ~20 V DC · 300 A · 6.5 kW
The built-in power supply occupies the entire left side. It converts 380–415 V three-phase power into a DC voltage of 17 to 21.6 V, with a current of up to 300 A, and provides an auxiliary 12 V output for the control board. It is itself cooled by the water in the circuit (its own cold plate, with inlet and outlet at the front). Efficiency above 95%: the remaining 5% also goes into the water.
- Three-phase LP20 power cord, not included
- Cannot run on 230 V single-phase without a converter
- The firmware adjusts the voltage for low-power and high-performance modes
Front panel: water connections, network, power
DN10 water inlet / outlet · manifolds · RJ45 · three-phase socket
Everything connects at the front. A main water inlet and outlet feed two manifolds that supply the three cold plates and the power supply. On the left: the power supply's three-phase socket, the Ethernet port, the control board's indicator lights and buttons, and the label with the serial number. The machine slides into a rack or an Antrack cabinet and is connected in a few minutes.
Rear panel
Closed: no air to exhaust
Where an air-cooled model expels hot air through two fans, the Hydro model is closed. The machines can therefore be packed tightly against one another in a cabinet, with no hot aisle and no air conditioning.
Chassis
339 × 173 × 207 mm · 12.3 kg
An aluminum sheet-metal shell with a partition between the power supply bay and the hashboard bay, side guide rails and a floor that supports the boards. Light and compact: an Antrack rack holds four Hydro machines, i.e. more than 20 kW of computing power in a single square meter.
Cold plate
Aluminum · pressed onto the 216 chips
An aluminum block hollowed out with channels, pressed onto all the chips through thermal paste. On the S21 Hydro, there is neither a heatsink nor a fan: the water carries away the board's heat, about 1.8 kW. The two connectors at the front are the board's water inlet and outlet.
Board water circuit
3 to 3.5 L/min · 35 °C → ≈ 43 °C
The water enters at the bottom of the board, runs along half of the chips to the far end, makes a U-turn and exits at the top. At 3 to 3.5 liters per minute per board, it warms up by about 8 °C while carrying away 1.8 kW: water entering at 35 °C leaves at around 43 °C. Above 45 °C at the outlet, the machine is at risk of overheating; insufficient flow or an air bubble in the plate has the same effect.
216 BM1368 chips
BM1 → BM216 · ≈ 0.5 TH/s and ≈ 8 W each
The chips are arranged in 18 columns of 12. Each one receives its work through the chain, tries billions of nonces per second and only returns those that produce a small enough hash. In the view, a chip lights up orange when work passes through it, and pink when it finds a result. The firmware numbers them from 0 to 215: a healthy board shows “ASIC 216/216”.
The chip we are about to open
BM1, the first in the chain · next level
BM1 is the first chip in the chain: it receives the work from the control board and passes it on to the other 215. Zoom all the way in, or click “BM1368 chip”, to go inside it.
The signal chain
CLK, CI, BO, RST: BM1 → BM216 · RO: return
The 216 chips are connected to one another by a handful of signals, in a chain:
- CI / CO: the work (block header, nonce range) enters through BM1 and travels down to BM216 (orange dots);
- RI / RO: the results travel back up from chip to chip to BM1, then on to the control board (blue dots);
- CLK: the 25 MHz clock, passed from chip to chip (the wave running along the traces);
- RST and BI / BO: the reset and a control signal, along the same path.
A single serial link thus drives the whole board. The flip side: a dead chip breaks the chain, and all the chips that follow it go silent.
18 voltage domains
12 chips in parallel × 18 domains in series
A BM1368 chip needs only about 1.1 V, but at a high current: powering all 216 chips in parallel would require more than 1,500 amps per board. The solution: group the chips in sets of 12 in parallel (one domain), then stack the 18 domains in series, like the batteries in a flashlight. The power supply delivers about twenty volts and around 85 A; each domain takes 1.1 V of it and sits on top of the previous one. That is the staircase displayed when you select this line.
T0 and T1 temperature sensors
U4 / U5 · I²C · 3.3 V · ±1 °C
Two digital sensors, one on the water inlet side (T0) and the other on the outlet side (T1), measure the temperature of the printed circuit board. They are small 8-pin packages from the TMP75 family: 12-bit measurement (0.0625 °C resolution), accuracy of around ±1 °C, read by the control board over an I²C bus and powered by it at 3.3 V.
- Alarm at 80 °C for the board, 95 °C for the chips
- A silent sensor prevents the board from starting, as a safety measure
- The difference between T0 and T1 gives an indication of the water flow rate
EEPROM (U6)
Board identity and calibration · I²C
A small memory that stores the board's serial number, its model and its factory settings (frequency and voltage calibrated at the end of production). The firmware reads it at startup; an empty or unreadable EEPROM produces the “EEPROM NG” error on the test bench. On this generation, it replaces the PIC microcontroller of the S19.
25 MHz crystal (Y1)
The clock for the entire chain
A crystal that oscillates 25 million times per second. Its signal passes from chip to chip, from BM1 to BM216, and each chip multiplies it with its own PLL to clock its hashing engines at several hundred megahertz. Without it, no chip responds.
Data connector (J1)
TX → BM1 · RX ← BM1 · RST · I²C · 3.3 V
The ribbon cable from the control board plugs in here. It brings in the work (TX, at 3.3 V, shifted to the chips' level by U1), the reset signal, the I²C bus for the sensors and the EEPROM, and the 3.3 V supply; it carries the results back (RX, via U2). One poorly seated ribbon cable, and the board disappears from the interface.
Power supply terminals
VDD_IN+ / GND · ≈ 20 V · ≈ 85 A
Two copper terminals screwed to the power supply's busbars. The negative (GND) connects to domain 1; the positive (VDD_IN) runs along the board up to domain 18. The current then flows through the 18 domains one after another. There is no converter between the power supply and the chips: it is the power supply, controlled by the control board, that sets the board voltage. A loose screw heats up and can burn the terminal.
25 V boost converter (U9)
Board voltage → 25 V
A small step-up converter (an inductor, a controller chip and capacitors) generates 25 V. Because each domain “floats” higher than the previous one, the regulators of the last domains need a voltage higher than that of the whole board: this 25 V supply powers them, as well as the last level shifters.
Regulators (LDO)
4 per domain · 1.2 V and 0.8 V
Each domain has its own linear regulators: one for 1.2 V and three for 0.8 V, each of the latter powering 4 chips. They provide the voltages for the chips' input/output circuits, measured relative to their domain's “ground”. The last two domains, at the top of the staircase, go through MP2019 pre-regulators powered by the boost converter.
Level shifters
17 · one at each step between two domains
Domain 2 sits 1.1 V higher than domain 1, and domain 18 nearly 20 V higher. To pass from one domain to the next, the chain signals must change their reference: that is the role of these 17 level translators, backed by the same number of amplifiers. A failed level shifter breaks the chain at the point where it sits.
Printed circuit board
Part number BHB686xx · one copper plane per domain
A multilayer board about 30 cm long. Beneath each column of chips, a copper plane forms the domain; a copper strip along the edge carries the power supply's positive to the last domain. The silkscreen numbers everything: BM1 to BM216, D1 to D18, U4 and U5 for the sensors, U6 for the EEPROM, Y1 for the crystal.
SHA-256 engines
The same circuit, repeated across the whole chip
Almost the entire surface of the chip is taken up by identical hashing engines, arranged in rows: this is what sets it apart from a GPU, where computation shares the space with schedulers, registers and caches. They all do the same work at the same pace, on different nonces. Together, they give the chip about 500 billion hashes per second (0.5 TH/s).
The engine we are about to open
One engine among hundreds · next level
A highlighted engine: this is the one the next level details. Zoom all the way in to see its pipeline: double SHA-256 hard-wired in stages, through which the nonces advance one stage per clock cycle.
Work distribution
Block header + nonce ranges
The work arrives from the control board: the block header (whose first 64 bytes, which do not change, are precomputed once) and a range of nonces to try. This network distributes it to all the engines, each one receiving its own range so that nothing is ever computed twice.
Chain link
Commands on one side, results on the other
The 216 chips on a hashboard are connected in a chain: each chip receives the commands from the previous one and passes them on to the next, and the results travel back the other way to the control board. A single serial link is enough to drive the whole board, but one faulty chip silences all the chips that follow it.
Result filter
Only returns the interesting nonces
Out of trillions of hashes per second, only a tiny fraction is worth reporting. The chip only returns the nonces whose hash falls below a threshold set by the control board: without this filter, the serial link would be saturated.
Clock (PLL)
25 MHz from the crystal → several hundred MHz
A PLL circuit multiplies the frequency of the board's crystal to clock the engines. The faster the clock, the more the chip computes, but the more power it consumes and the more it heats up: this setting, together with the voltage, is what an optimization firmware such as the HappyMining firmware adjusts.
Built-in thermal diode
1 per chip · read by an external sensor
A diode etched into the silicon, whose voltage varies with the chip's temperature. An external sensor can read it through two dedicated pins: this is how open-source miners such as the Bitaxe measure a BM1368. On the hashboard, the board is continuously monitored by its two sensors, T0 and T1.
Input: header and nonce
A new nonce on every clock tick
At the pipeline input, a register holds the fixed part of the block header, and a counter supplies a new nonce on every cycle. A new calculation therefore starts on every clock cycle, without waiting for the previous one to finish.
64 stages: first SHA-256
One compression round per stage, hard-wired
Each stage is one round of the SHA-256 function implemented as a circuit: 32-bit additions, rotations, the Ch and Maj logic functions, and the round constant K wired in directly. Nothing is read from memory, nothing is decoded: the signal passes through the stage and moves on to the next one at the next clock tick.
Message schedule
The 64 W words, prepared in parallel
Alongside each lane runs a second, thinner line: from the message, it prepares the 64 words that each stage consumes. It advances at the same pace as the data, so that each stage receives its word at exactly the right moment.
64 stages: second SHA-256
Bitcoin hashes twice
Bitcoin uses a double SHA-256: the result of the first pass is immediately fed into a second one. On the chip, the line makes a U-turn and chains 64 more stages: 128 stages in total between the input and the output.
Nonces on the move
128 calculations in progress at the same time
Here is the secret of the speed: the pipeline. A calculation takes 128 cycles to pass through the circuit, but since a new nonce enters on every cycle, 128 nonces are processed at the same time, each at a different stage, and one hash comes out on every cycle. No stage ever waits: this is the maximum throughput the silicon allows.
Output: comparison with the target
Enough zeros? The nonce is sent back
At the end, the hash is compared with the target: if it is small enough (if it starts with enough zeros), the nonce is sent to the chip's filter and then to the control board; otherwise it is simply discarded. The vast majority of calculations end this way, and that is normal: mining means trying.
